Verification Engineer

• Develop and execute functional verification plans for hardware designs.

• Design and implement verification environments using SystemVerilog, UVM, and OVM.

• Write testbenches and test cases to validate RTL designs.

• Perform debugging and root cause analysis of design and verification issues.

• Collaborate with design teams to ensure high-quality hardware delivery.

• Automate verification processes and improve coverage metrics.

• Analyze simulation results and ensure compliance with design specifications.

• Contribute to continuous improvement of verification methodologies.