Develops block, macro, or chip-level layouts and floorplans in line with project requirements, specifications, and design schematics.
Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs.
Conducts analyses, tests, and verifies designs using various tools and techniques to identify and troubleshoot issues. Stays updated on new verification methods.
Collaborates with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.

Required Qualifications

Experience in high-speed IO/ESD/Analog layout design: 8 to 12 years of solid experience.
FinFET Layout Expertise: Proven expertise in working on FinFET layouts in lower nodes, with a preference for TSMC 7nm and below.
Tool Proficiency: Expertise in using the best and latest features of Cadence VXL and Calibre DRC/LVS.
Layout Design & Verification Tools: 2+ years of experience using layout design and verification tools (e.g., Cadence, LVS, rmap).
IO/ESD Design: Basic understanding of IO/ESD designs.
Scripting Knowledge: Knowledge of Basic or Perl.
Collaboration & Independence: Capable of working independently and with a team, and effectively managing work with a contract workforce.
Global Communication: Ability to work and communicate effectively with global engineering teams.

Minimum Education & Experience

Bachelor's Degree: Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or a related field, along with 2+ years of experience designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design).
Associate's Degree: Associate's degree in Computer Science, Mathematics, Electrical Engineering, or a related field, along with 4+ years of experience designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design).
High School Diploma: High School diploma or equivalent, along with 6+ years of experience designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design).