SOSourceright Technologies
STA Engineer
Bangalore ₹6-8 LPA Posted 2 Sept 2025
FULL TIME
ADI flows
Cadence flows
convergence
power domain-based designs
STA setup
Job Description
- Timing analysis, validation and debug across multiple PVT conditions using Tempus.
- Familiar with Tempus DMMMC flow for STA
- STA setup, convergence, reviews, and signoff for scan and func.
- Review of Unconstrained endpoints and check timing reports.
- Proficient in STA and timing methodologies with good understanding of noise, crosstalk, and OCV effects.
- Should have worked on both block level and full chip timing closure at lower nodes 22nm, 16nm, 5nm
- Additionally, closely interact with designers/synthesis/PNR team to provide the feedback to ensure smooth timing closure.
- Working proficiency with tcl, python scripting
- Previous experience with ADI flows/ Cadence flows for STA preferred
- Previous experience with power domain-based designs preferred.