SOC design

• Experience in Logic design /micro-architecture / RTL coding is a must.
• Must have hands on experience with SoC design and integration for complex SoCs.
• Experience in Verilog/System-Verilog is a must.
• knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC.
• Understanding of Memory controller designs and microprocessors is an added advantage
• Work closely with the SoC verification and validation teams for pre/post Silicon debug
• Hands on experience in Low power SoC design is required
• Hands on experience in Multi Clock designs, Asynchronous interface is a must.
• Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.
• Understanding of constraint development and timing closure is a plus.
• Experience in Synthesis / Understanding of timing concepts is a plus.
• Experience creating padring and working with the chip level floorplan team is an added advantage.

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.