Memory IP Design Engineer- (eFuse)

Required Qualifications:  

• Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 4-20 years of relevant experience
• Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys…) tools for schematic design & simulations (Virtuoso, Spectre, HSPICE, etc.)
• Experience in NVM Memory (MTPM/OTP/MRAM/SRAM/eFlash) designs
• Experience in timing characterization, Verilog is desirable
• General analog mixed-signal design concepts is desirable
• Circuit design, Reliability analysis, Statistical analysis of circuits
• Must have good technical verbal and written communication skills and ability to work with cross functional teams
• Be able to collaborate with technical design leads on multiple concurrent projects.

Preferred Qualifications: 

• Knowledge in various technologies (Bulk, CMOS & SOI) process is desirable
• Hands on knowledge of state-of-the-art memory or analog design flows
• Programming experience applicable to design flow automation tasks
• Dedication and the capability to work within a very dynamic interdisciplinary environment
• Knowledge of 45/32/28nm and below technology nodes is an advantage.
• Ability to communicate as well as work efficiently in an international multi-disciplinary environment.
• Exceptional Spoken and Written Proficiency in English 
• Strong analytical and problem-solving skills.