AN

Digital Design Engineer

Analog Devices
Bangalore50K-4 LPA Posted 25 Jun 2025
FULL TIME
iso 26262
Static Timing
Soc Architecture
Synthesis
Rtl Design
+2 more

Job Description

  • Expertise and strong hands-on experience in RTL design using System Verilog or VHDL
  • Digital system architecture, Processor subsystem architecture and block definition
  • Experience working on complex SoCs
  • RTL design quality analysis
  • Good understanding of digital design Synthesis, DFT and Static Timing Analysis
  • Basic understanding of mixed-signal designs
  • Experience with defining test bench architecture at block and subsystem level
  • Experience with defining test plans, relevant checkers, and coverage metrics
  • Experience with gate level simulations and debug
  • Experience in automotive Functional Safety (ISO 26262) is a plus
  • Experience in digital verification is a plus
  • Experience with Cadence tools is a plus
  • Experience in scripting languages such as Python and Perl is a plus
  • Strong analytical and problem-solving skills
  • Strong written and verbal communication skills

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