ASIC Backend Developer

Key Responsibilities:

• Collaborate on ASIC backend design activities including synthesis, place-and-route, timing analysis, and physical verification.
• Develop and optimize design flows using EDA tools (e.g., Synopsys, Cadence, Mentor).
• Perform static timing analysis (STA) and fix timing violations to meet design constraints.
• Conduct signal integrity analysis, power analysis, and floorplanning.
• Work with RTL designers to optimize designs for manufacturability and performance.
• Generate design documentation, scripts, and reports to support ASIC development.
• Support debugging and silicon validation activities.
• Participate in design reviews, sign-off processes, and tape-out preparation.

Qualifications and Requirements:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 3+ years of experience in ASIC backend design or physical design.
• Proficiency with ASIC EDA tools (e.g., Synopsys Design Compiler, IC Compiler, PrimeTime, Cadence Innovus).
• Strong knowledge of ASIC design flow, timing closure, and verification.
• Experience with scripting languages (TCL, Perl, Python) for automation.
• Understanding of semiconductor process technologies and constraints.
• Excellent problem-solving and communication skills.

Desirable Skills:

• Experience with low-power design techniques and methodologies.
• Familiarity with DFT (Design for Test) insertion and ATPG tools.
• Knowledge of mixed-signal ASIC design is a plus.
• Exposure to RTL design and verification flows.
• Experience with FPGA prototyping and emulation.