IB

Application Developer-Oracle Cloud Reports

IBM
Bangalore5-7 LPA Posted 13 Nov 2025
FULL TIME
Pcie
Axi
Uvm
systemverilog
Python

Job Description

Your Role and Responsibilities:

  • As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers.
  • Leading the development of the verification environment, testbenches and writing testcases.
  • Develop skills in IBM Functional verification tools and methodologies.
  • Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design.
  • Work with development team to ensure coverage criteria is met.

Required Education:

  • Bachelor's Degree

Preferred Education:

  • Bachelor's Degree

Required Technical and Professional Expertise:

  • 9+ years of experience in Functional Verification of processors or ASICs.
  • Minimum 6+ years of experience in any of the following: Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification.
  • Core architecture/micro-architecture verification.
  • Multi-processor cache coherency, Memory subsystem verification.
  • IO subsystem knowledge, any of the protocols like PCIe/CXL, DDR, Flash, Ethernet etc.
  • AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification.
  • Gate level simulation and emulation.
  • Track record in leading team.
  • Clock domain crossing and reset domain crossing verification.
  • Knowledge of functional verification methodology - UVM/OVM/SystemVerilog/SystemC.
  • Knowledge of HDLs (Verilog, VHDL).
  • Developed test-plans and test strategies for IP/unit/block level verification.
  • Good object-oriented programming skills in C/C++, scripting languages like Python/Perl.
  • Worked on multiple levels of verification (unit/element/sub-system/system level).
  • Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow.
  • Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails.

Preferred Technical and Professional Experience:

  • Stress testing and ability to identify corner case scenarios.
  • Knowledge of high-speed SERDES and PHY Verification.
  • Good understanding of computer system architecture and microarchitecture.
  • Knowledge in IP Integration and SoC level verification.

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